FLEX 10K
EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356
EPF10K10 EPF10K20 EPF10K30 EPF10K40
EPF10K50 EPF10K70 EPF10K100
General Description
EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356
Altera’s FLEX 10K devices are the industry’s first embedded PLDs. Based on reconfigurable CMOS SRAM elements, the Flexible Logic Element MatriX (FLEX) architecture incorporates all features necessary to implement common gate array megafunctions. With up to 250,000 gates, the FLEX 10K family provides the density, speed, and features to integrate entire systems, including multiple 32-bit buses, into a single device.FLEX 10K devices are reconfigurable, which allows 100% testing prior to shipment. As a result, the designer is not required to generate test vectors
for fault coverage purposes. Additionally, the designer does not need to manage inventories of different ASIC designs; FLEX 10K devices can be configured on the board for the specific functionality required.Table 6 shows FLEX 10K performance for some common designs. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356.All performance values were obtained with Synopsys DesignWare or LPM functions. No special design technique was required to implement the
applications; the designer simply inferred or instantiated a function in a Verilog HDL, VHDL, Altera Hardware Description Language (AHDL), or schematic design file. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356.The FLEX 10K architecture is similar to that of embedded gate arrays, the fastest-growing segment of the gate array market. As with standard gate
arrays, embedded gate arrays implement general logic in a conventional “sea-of-gates” architecture. In addition, embedded gate arrays have dedicated die areas for implementing large, specialized functions. By embedding functions in silicon, embedded gate arrays provide reduced
die area and increased speed compared to standard gate arrays. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356.However, embedded megafunctions typically cannot be customized, limiting the designer’s options. In contrast, FLEX 10K devices are programmable, providing the designer with full control over embedded megafunctions and general logic while facilitating iterative design changes during debugging. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356
Each FLEX 10K device contains an embedded array and a logic array. The embedded array is used to implement a variety of memory functions or complex logic functions, such as digital signal processing (DSP),microcontroller, wide-data-path manipulation, and data-transformation
functions. The logic array performs the same function as the sea-of-gates in the gate array: it is used to implement general logic, such as counters,adders, state machines, and multiplexers. The combination of embedded and logic arrays provides the high performance and high density of embedded gate arrays, enabling designers to implement an entire system on a single device.
EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356
FLEX 10K devices are configured at system power-up with data stored in an Altera serial configuration device or provided by a system controller. Altera offers the EPC1, EPC2, EPC16, and EPC1441 configuration devices,which configure FLEX 10K devices via a serial data stream. Configuration data can also be downloaded from system RAM or from Altera’s BitBlasterTM serial download cable or ByteBlasterMVTM parallel port download cable. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356.After a FLEX 10K device has been configured, it can be
reconfigured in-circuit by resetting the device and loading new data.Because reconfiguration requires less than 320 ms, real-time changes can be made during system operation. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356.FLEX 10K devices contain an optimized interface that permits microprocessors to configure FLEX 10K devices serially or in parallel, and synchronously or asynchronously. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356. The interface also enables microprocessors to treat a FLEX 10K device as memory and configure the device by writing to a virtual memory location, making it very easy for the designer to reconfigure the device. EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356.FLEX 10K devices are supported by Altera development systems; single,integrated packages that offer schematic, text (including AHDL), and
waveform design entry, compilation and logic synthesis, full simulation and worst-case timing analysis, and device configuration. The Altera software provides EDIF 2 0 0 and 3 0 0, LPM, VHDL, Verilog HDL, and other interfaces for additional design entry and simulation support from
other industry-standard PC- and UNIX workstation-based EDA tools.The Altera software works easily with common gate array EDA tools for synthesis and simulation. For example, the Altera software can generate Verilog HDL files for simulation with tools such as Cadence Verilog-XL. Additionally, the Altera software contains EDA libraries that use devicespecific features such as carry chains which are used for fast counter and arithmetic functions. For instance, the Synopsys Design Compiler library supplied with the Altera development systems include DesignWare
functions that are optimized for the FLEX 10K architecture.The Altera development systems run on Windows-based PCs and Sun SPARCstation, and HP 9000 Series 700/800 workstations.
EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356
Functional Description
Each FLEX 10K device contains an embedded array to implement memory and specialized logic functions, and a logic array to implement general logic.EPF10K50BC356-1N Altera IC FLEX 10K FPGA 50K BGA356
The embedded array consists of a series of EABs. When implementing memory functions, each EAB provides 2,048 bits, which can be used to create RAM, ROM, dual-port RAM, or first-in first-out (FIFO) functions.When implementing logic, each EAB can contribute 100 to 600 gates towards complex logic functions, such as multipliers, microcontrollers,state machines, and DSP functions. EABs can be used independently, or multiple EABs can be combined to implement larger functions.