Despite the increasingly negative predictions of semiconductor forecasters, predictable change in the semiconductor industry comes from monitoring capital investment. From this, we can predict the supply side of the supply/demand balance. Macro-economic factors tend to drive the demand side and these are currently uncertain.
But there is a big change in semiconductor supply characteristics in progress today and it will have a significant impact (
Figure 1 below).
Click on image to enlarge.For the decade from 1998 to 2009, pure play silicon foundries invested a relatively constant amount per year in capital equipment, averaging $6.8B. In 2010, this amount doubled to $14B. It increased again in 2011 to $18.7B. It is forecasted to continue at a high level in 2012 at about $17B. Currently, capacity that is capable of producing these 28nm and 20nm families of technology constitutes about 22% of the total silicon area in production (
Figure 2 below).
Click on image to enlarge.Although yield and throughput of 28 and 20nm wafers is still in a relatively early phase, the ramp-up is progressing at least as rapidly as the previous major generation at 40/45nm and 65nm (
Figure 3 below).
Click on image to enlarge. As with every semiconductor generation in history, yield and throughput will continue to improve. As this happens, the shortages of today will disappear and foundries will aggressively encourage their customers to execute more designs at the 28 and 20nm generation nodes. While differences in 28 and 20nm processes, such as double patterning, create challenges, the generation of capital equipment is largely compatible with both.
With such a high volume of wafers, the foundry learning curve and the large available capacity will cause increasingly aggressive wafer pricing over time. Fabless semiconductor companies (or fab-lite ones) will be encouraged to re-design older products into the 28nm generation of technology to remain cost competitive, or to add new features. Cost-effective wafers from foundries will encourage totally new designs that would not have been possible at today’s wafer cost. This market dynamic is already a foregone conclusion. It means that we are entering a period of significant growth in design activity that should last at least two years.
But what about the inevitable consequences of lower wafer costs on semiconductor average selling prices (ASPs), you may say? Won’t the lower wafer costs lead to lower component ASPs? They will indeed. And eventually they can lead to lower end equipment costs and prices, or at least to more capability for the same price.
And once again you may ask, “Isn’t that what we’ve historically called a price-driven semiconductor recession?” Maybe. But this time is different. Previous price-driven semiconductor recessions have been stimulated first by excess memory capacity. Equipment companies can quickly adjust to this kind of change by doubling the memory in their systems so that, while the memory suppliers may feel some impact, the electronic equipment selling prices remain relatively constant.
In the last two years, however, investment in capacity for memory, both DRAM and FLASH, has been light. Because of pricing pressures, memory producers have been much less aggressive in the capital spending than the silicon foundries.
So, for the first time in history, we are likely to have a semiconductor cycle where memory pricing remains stronger than SoC pricing. Equipment companies will have some challenges taking advantage of this situation since they will need to do redesigns of their systems. It’s possible that the market pricing pressure will be delayed until memory capital investment catches up. That could take some time.
Whatever happens, the capital investment already in place assures that the 28nm and 20nm families of technology will be one of the most prolific generations in semiconductor history. Expanded design activity, aggressive yield improvement and other volume-driven efficiencies will stimulate new design and manufacturing innovations. And they will make possible another wave of new applications.
Despite concern about near term demand, semiconductor design innovation in the next two years is destined to accelerate.
Walden Rhines is chairman and CEO of EDA tool vendor Mentor Graphics Corp.