SAN FRANCISCO – A consortium touting fully depleted silicon-on-insulator (FDSOI) technology for mobile computing applications presented a united front this week in promoting the process technology as a viable alternative to Intel’s FinFET manufacturing approach.
ARM, IBM, Soitec and STMicroelectronics along with foundry partner Globalfoundries and R&D organizations like CEA-Leti made their case for the FDSOI approach at the Semicon West conference here. They also stressed the need for “collaborative innovation” as new mobile technologies grow in complexity and cost. “The need to collaborate has never been more important,” said Gary Patton, vice president of IBM’s Semiconductor R&D Center.
The chip makers make up the core of the SOI Industry Consortium, and its members essentially operate like a “virtual IDM,” or integrated device manufacturer, Patton added.
Every part of the semiconductor supply chain must do its part if the emerging chip technology is to succeed, added Subramani Kengeri, vice president of design solutions at Globalfoundries, which announced in June that it will work with ST on 28- and 20-nm devices based on FDSOI technology.
With growing pressure to boost the performance of mobile devices while at the same time reducing power consumption, “Partnering is the name of the game,” argued Phillippe Magarshack, vice president of ST’s Technology Research and Development Group. “Doing everything on your own [doesn’t] make sense.
ST’s mobile chip joint venture ST-Ericsson announced earlier this year that it will use planar FDSOI technology in its next-generation NovaThor mobile application processor.
Magarshack said ST will tape out the first 28-nm chips based on planar FDSOI technology next month, and it expects to begin sampling devices by the end of this year.
In FDSOI transistors, the electrical conduction channel formed between source and drain is confined to the ultrathin silicon layer under the gate oxide and above the SOI buried oxide. (Source: ST-Ericsson)