Xilinx just announced immediate availability of the Spring 2012 edition of
Xcell Journal magazine, featuring an in-depth look at the
Vivado Design Suite, the new IP and system-centric design environment built from the ground up to accelerate design productivity for the next decade of ‘All Programmable’ Devices.
In addition to the Vivado Design Suite cover story, Xcell Journal issue 79 is packed with a number of insightful articles including a how-to piece on implementing the CORDIC algorithm in FPGA designs, an article describing a new methodology in which designers use formal verification for hardware and software co-verification simultaneously, and a piece describing a method for accelerating partial reconfiguration. In another methodology article, engineers at Agilent describe how they worked with Xilinx and the AutoESL high-level synthesis tool, which is included in the new design suite as the Vivado High Level Synthesis tool, to create an in-fabric, processor-free UDP network packet engine.
The issue also includes an inspirational story about a high school teacher in Italy who teaches students to use Xilinx FPGAs to build highly sophisticated robots for Europe robotics competitions.
“This is one of the most dynamic issues of Xcell Journal that we’ve published,” said Xcell Journal Publisher, Mike Santarini.
“It starts off with a deep dive into Xilinx’s exciting new Vivado Design Suite for Xilinx’s 7 series FPGAs, Zynq-7000 EPP and future devices. From there it has a broad range of methodology and how-to articles that I hope readers will find very instructive and even inspirational.”Xcell Journal Spring 2012 Edition Highlights Cover Story- Xilinx Unveils Vivado Design Suite for the Next Decade of ‘All Programmable’ Devices
Design Methodology and Application Features- High-Level Synthesis Tool Delivers Optimized Packet Engine Design
- Accelerating Distributed Computing with FPGAs
- FPGAs Enable Flexible Platform for High School Robotics
- Smart, Fast Trading Platforms Start with FPGAs
How-To Features- Accelerate Partial Reconfiguration with a 100% Hardware Solution
- How to Use the CORDIC Algorithm in Your FPGA Design
- Using Formal Verification for HW/SW Co-verification of an FPGA IP Core
- New Tools Take the Pain out of FPGA Synthesis
Opinions, News and Upcoming Events- Letter from the Publisher: Welcome to the Programmable Renaissance
- App Notes: A selection of the latest Xilinx application notes from Xilinx.com
- Xclamations! Supply a caption for our techy cartoon. - Three chances to win an Avnet Spartan-6 LX9 MicroBoard!
About Xcell JournalXcell Journal is a quarterly magazine that provides electronic designers of programmable digital systems with in-depth technical information regarding the latest advances in hardware and software technologies, systems, applications, services and support. This digital magazine is available free and is accessible on any standard Internet browser, requiring no software downloads and allowing readers to browse, search, make notes, email authors and click through to advertiser websites. For additional information, or to download individual Xcell Journal articles in PDF format, go to Xcell Online.
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